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TLA5000B Series logic analyzers combine debug power with simplicity
and affordability
The affordable TLA5000B Series
logic analyzers make high-speed timing resolution, fast state
acquisition, deep memory, and sophisticated triggering available to any
digital designer who needs to identify initialization failures,
operation crashes and intermittent operation. For first-time as well as
experienced logic analyzer users, the TLA5000B Series is ideal for
single-bus timing and state analysis. An intuitive user interface,
familiar Windows-based desktop and OpenChoice™ networking and analysis
features make the TLA5000B Series logic analyzers easy to network into
your design environment.
500 ps timing resolution and 32
Mb memory depth with simultaneous 125 ps MagniVu timing resolution
within each acquisition means you can measure digital signal timing on
increasingly faster signals with confidence. With MagniVu timing
resolution, find difficult problems such as digital logic errors,
glitches, setup/hold violations, and crosstalk quickly. Use setup/hold
violation triggering and display to validate setup/hold performance of
digital devices.
Today, most designs can have
both digital and analog anomalies. With iView time-correlated digital-analog
view, you’ll clearly see how analog anomalies are affecting your digital
signals right on your logic analyzer display.
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